November 13, 2026 How AI Chip Packaging Is Shaping Where Companies Expand

Packaging is now one of the hardest steps in building AI chips, and access to the right facilities and engineers is shaping site decisions.

by Seamus Carroll, VP, Head of Semiconductors, IDA Ireland

Investment in AI infrastructure is expected to push global semiconductor sales to about $1.66 trillion this year, more than double last year’s total. That demand is also exposing the limits of how chips have traditionally improved.

For decades, chips got faster and cheaper mainly because manufacturers kept shrinking transistors, a pattern known as Moore’s Law. That approach is getting harder and more expensive to sustain. Designing a single leading-edge chip now costs about $725 million, roughly 15 times what a design cost in the late 2000s.

Chipmakers are increasingly turning to advanced packaging, which connects several smaller chips, called chiplets, closely inside one package so they work as a single system. Advanced packaging revenue is forecast to grow from $46 billion in 2024 to $79.4 billion by 2030. The shift reaches well beyond chipmakers to industrial companies, including automakers and medical device makers, that are now developing custom chips.

For all of them, packaging has become one of the hardest steps in bringing a new chip to market. The facilities and engineers that solve packaging problems are not available everywhere, so access to them now shapes where companies expand.

Where promising chips stall

Any manufacturer that has moved a product from prototype to mass production knows that a design that works in the lab can fail in the factory. In semiconductors, that gap increasingly shows up in packaging. A package that holds several chips concentrates their heat, and stacking chips makes the problem worse. Parts must line up with extreme precision, and one faulty chiplet can mean scrapping an entire assembly.

Even the industry’s largest players have had to rework advanced designs. Nvidia’s Blackwell AI chip, which joins two dies in a single advanced package, needed design changes in 2024 to improve yields before moving into production.

Smaller companies have less room to absorb a late discovery. A shared fabrication run for a small silicon photonics chip can cost up to €100,000, not including design, and can take six to 12 months. Finding a packaging problem afterward often means paying for another run, while salaries and overheads keep drawing down cash and customer and funding milestones slip.

Shared infrastructure for the hardest step

Few companies can afford to build every packaging, assembly and testing capability themselves. Analysts have pointed to shared testing infrastructure and engineering talent as two ways to manage the rising cost of chip development, and Europe is investing in both.

Under the EU Chips Act, the EU and its member states have committed €3.7 billion to five semiconductor pilot lines designed to close the gap between lab innovation and industrial-scale manufacturing. The lines offer open access to advanced facilities where companies and researchers can develop and test new chip technologies before committing to volume production. Access extends to international partners, with preferential terms for smaller companies and academic institutions. In June, the European Commission proposed Chips Act 2.0, which builds on the progress of the original act and aims to strengthen advanced chip production in Europe.

How Ireland fits into Europe’s pilot lines

In Ireland, Tyndall National Institute, one of Europe’s flagship research and technology organisations specializing in semiconductors, photonics and quantum technologies, is one of the host institutions for three of Europe’s five pilot lines.

Tyndall’s work across the three lines centers on three problems that are pressing in AI hardware. At NanoIC, which works on the most advanced chip technologies now in development, Tyndall contributes on emerging embedded memories, a key technology to overcome the so-called “memory wall.” At FAMES, the first of the five lines to reach full operation, Tyndall integrates components onto the chip to deliver power more efficiently. At PIXEurope, a €400 million pilot line for chips that use light to move data, Tyndall leads packaging technology development. Moving data with light is gaining ground as large cloud providers look for power savings.

Companies can reach these lines directly through Tyndall, as well as through central portals and regular open calls. For U.S. companies with operations in Ireland, that offers a local route into Europe’s pilot-line network.

For a company choosing a partner, track record matters as much as equipment. Tyndall led PIXAPP, which set up the world’s first open access pilot line for packaging photonic chips. The standardized packaging building blocks and assembly design kits developed there are now being used in PIXEurope. They let companies build validated packaging rules into their chip layouts from the start.

Equipment makers work on site as well. German photonics assembly equipment maker ficonTEC has a team and systems at Tyndall, so companies can prototype, test reliability and analyze failures in one place. Bringing local startups, global equipment suppliers and multinationals together this way creates a faster feedback loop that can lower the risk, cost and time involved in verifying new hardware.

Building packaging talent

Pilot lines pay off only when there are engineers who know how to use them. Packaging and integration skills are in short supply worldwide, and engineers who combine electrical engineering, materials science, thermal design and testing take years to develop.

Ireland has been developing that workforce deliberately. In June, it launched Rinn Semiconductors, a national research center hosted at Tyndall that focuses on the heterogeneous integration of chiplets and advanced packaging. Backed by a €71 million award from Research Ireland, the center will train 110 PhDs. It also aims to complete more than 100 projects with industry over eight years.

Training at Tyndall is hands-on. More than 60 engineers took courses inside its facilities in the past year, covering micro- and nanofabrication, micro-transfer printing and photonics packaging. The program is open to participants from Ireland, across Europe and beyond, so multinationals can train engineers from sites outside Ireland as well. At IPIC, Ireland’s photonics research center, almost 70% of PhD trainees go on to careers in industry, at companies including ASML, Analog Devices and Meta.

Demand for those engineers is set to grow. Ireland is already home to 15 of the world’s 30 largest semiconductor companies, and KPMG estimates that the sector could support up to 34,500 new roles by 2040.

Lessons for manufacturers planning their next move

• Plan for production from the first design cycle. Problems are cheapest to fix before a design is locked. In chips, that means bringing packaging engineers into early architecture reviews instead of handing them a finished design.
• Test at scale before building at scale. Shared facilities let companies prove a new process before investing in their own capacity. In chips, ask whether a pilot line can reproduce real operating conditions, produce evidence strong enough to justify the next round of investment and offer a credible path to manufacturing partners.
• Treat talent and location as part of the technical plan. The partners, facilities and engineers a company needs to scale a new product are rarely spread evenly, and national investment agencies can help companies find them. In Ireland, IDA Ireland connects companies with research collaborators such as Tyndall and with R&D support, including a refundable 35% R&D tax credit.

As AI pushes more of the industry’s progress into the package, the companies that move fastest will plan for packaging early, close to the pilot lines and engineers they need. Ireland has spent years building that combination. 

About the Author:
Seamus Carroll is vice president and head of Semiconductors at IDA Ireland, the Irish government agency responsible for attracting foreign direct investment to Ireland. With nearly three decades of experience advancing Ireland’s industrial and technology sectors, he works closely with leading semiconductor companies, policymakers, and investors to position Ireland as a strategic hub for chip design, wafer fabrication, advanced packaging, research and development, and semiconductor-enabled technologies.

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